The present invention relates to error protection for integrated circuits, and more specifically, to shared error protection for integrated circuits including a plurality of register banks.
As integrated circuits continue to be made smaller many new dependability issues are becoming increasingly important. For example, as the size of integrated circuits becomes smaller, radiation-induced faults, such as single-event upsets (SEUs) and multi-bit upsets (MBUs), are becoming more common. An SEU or MBU can occur when a particle passes through an integrated circuit. The particles may convert their kinetic energy to electrical energy which can be deposited in the circuitry. This energy can affect the state of the circuitry, for example flipping a bit, if the deposited energy exceeds the energy level which is required to hold the correct state. An SEU occurs when a particle changes the state of a single circuit element and an MBU occurs when a particle changes the state of two or more circuit elements. Cosmic rays and other common radiation types can result in SEUs and MBUs in integrated circuits. Indeed, as integrated circuits continue to decrease in size, lower energies are needed to change the internal state of the circuitry. Therefore, radiation-induced faults are becoming an increased reliability concern for modern integrated circuits.
Currently, error protection for integrated circuits does not consider the configuration of the register bank or its proximity to other register banks on the same integrated circuit. Accordingly, current error protection techniques for register banks are often incapable of detecting a MBU.